Written by: Mats Jonback and Stefan Schultz

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The APZ 212 40 is the first central processor of a new generation based on industry-standard microprocessors. It introduces a new warm-standby/hot on-demand system principle: the CP has two independent sides, each of which contains two processors—one that serves as an instruction processing unit and one that serves as a signal processing unit—which run as a two-way symmetrical multiprocessing computer. The APZ virtual machine handles ASA execution and is the middleware that guarantees telecommunications-grade availability. The authors describe the APZ 212 40 hardware and software, the warm-standby concept for high availability, and differences and similarities between this and previous APZ processors.

[First published in Ericsson Review no. 01, 2001]