High Level Synthesis (HLS) is a promising technology where algorithms described in high-level languages are automatically transformed into a hardware design. This paper describes a compiler toolchain that automatically transforms existing software in a limited domain to a functional hardware design.

Teemu Rinta-aho (Ericsson Research), Mika Karlstedt (Ericsson Research), Madhav P. Desai (IIT Bombay)

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The Click2NetFPGA Toolchain

IEEE notice