Programming Many-core Chips

Based on current technology trends, in the near future programmers will have to program chips with hundreds or even thousands of processor cores, called many-core chips. Given the scale of parallelism inherent to these chips, software designers face new challenges in terms of operating systems, middleware and applications. This book will serve as a single-source reference to the state-of-the-art in the research and practical programming of many-core chips.

The book is structured in four main parts. In the first part we survey the state of the art in multi-core HW architecture and we evaluate different technologies related to instruction set architectures, cache and shared memory structure and scalability, on-chip interconnects, power design, but also novel ideas such as 3D stacking and innovative usage of frequency and voltage scaling.

The second part introduces currently available technologies for programming multi-core processors, covering all layers from operating systems to the application programming models. It lays the foundation for part three, through the detailed discussions of the concepts related to parallel programming in general. Besides introducing the terminology that we will use in the third part of the book, we also take a critical look at the bottlenecks and limitations with current solutions, thus setting the frame for the ideas presented in the third part.

The third part of the book targets novel approaches to programming true many-core chips, through the complete software stack. It describes the principles that shall underpin the architecture of operating systems for many-core chips: space-shared scheduling, support for heterogeneity, power awareness and the role of virtualization, illustrated through some of the most promising research operating systems emerging from the OS research community. Then we explain and compare key concepts in the design of software for massively parallel systems, such as shared memory versus message passing approaches, data versus computation movement, as well as several emerging techniques. We explore the most promising programming models for many-core processors, focusing on scalability, such as the task-based model and the actor model. Finally, we survey and compare the currently available programming frameworks, such as OpenMP, Threading Building Blocks, the Erlang language as well as many other libraries and programming languages.

The book is available for pre-order from Amazon worldwide and is scheduled to be released in July.

Programming Many-core Chips

Programming Many-core Chips

András Vajda, with contributions from Diarmuid Corcoran and Mats Brorsson

2011, 237 p., hardcover

ISBN-10: 1441997385

ISBN-13: 978-1441997388

Avaliable here