Towards compute capacity maximization in constrained interconnect multi-chip quantum computing

Quantum computing holds promise for efficiently performing optimization tasks. Reaching its full potential is currently hindered by the presence of noisy qubits and short coherence times in intermediate scale quantum devices. Therefore, practical use is limited to small problems. Multi-chip quantum computing offers a potential solution.

Research paper

#QuantumComputing

We have developed two multi-chip mapping methods that maximize compute capacity utilization of quantum processing units (QPUs) while addressing their limited coherence times and the transmission rates of quantum interconnects. These methods assess critical parameters of QPUs and interconnects in a multi-chip quantum network, enabling optimal assignment of quantum gates in a quantum algorithm onto the network. Our methods produce runnable subcircuits, mapped to a minimum number of capacity maximized QPUs while achieving high-fidelity multi-chip quantum computing.

Full abstract in IEEEXplore DOI: 10.1109/QCE60285.2024.10309

Authors

Muhammad Asad Ullah, Ahsan Javed Awan, Elias Svensson – Ericsson Research

Published in: 2024 IEEE International Conference on Quantum Computing and Engineering (QCE)

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3Towards Compute Capacity Maximization in Constrained Interconnect Multi-Chip Quantum Computing

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